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"Achieving 1.4-nanometer performance in just 5 years? Top US chip researchers interpret Huawei's 'Tao Law': Certain dimensions may allow for shorter development cycles, revealing limitations of current advanced chips."

原文:5年后实现等效1.4纳米?美国顶尖芯片学者解读华为“韬定律”:某些维度可能具备更短研发周期,暴露现在先进芯片某些方面的局限

Summary of Key Points

As Moore's Law (which states that the number of transistors doubles every 18-24 months) approaches its physical and cost limitations, Huawei has proposed the "Tao Law," a new approach that breaks away from the traditional focus on shrinking transistors. By optimizing the entire system stack—software, packaging, design, and ecosystem—the company aims to achieve an equivalent transistor density of 1.4-nanometer technology by 2031. Scholar Andrew B. Kahng interprets this as a statement of Huawei's determination to enhance the value of its system products. In the post-Moore era, chip optimization should shift from focusing on size to emphasizing "system value." EDA (Electronic Design Automation) tools and 3D integration will become crucial in this process. The term "equivalent 1.4 nanometers" refers to meeting certain key performance indicators rather than using the actual 1.4-nanometer manufacturing process. If successful, this approach could drive industry transformation and reduce reliance on cutting-edge fabrication techniques.

Detailed Analysis

1. Tao Law: A New Path to Overcome Limitations in the Post-Moore Era

Moore's Law is no longer feasible as transistors have become extremely small, approaching atomic levels. Further reduction would lead to soaring costs and encounter physical constraints (such as increased current leakage). Huawei's Tao Law represents a shift from the traditional approach of continuously shrinking transistors to a more holistic strategy that optimizes all aspects of the chip, including software design, hardware architecture, packaging processes, and the associated ecosystem. This includes technologies like 3D integration and better software-hardware coordination to make products more competitive in the market. According to Andrew, this approach not only demonstrates Huawei's commitment to the semiconductor industry but also challenges the traditional focus on process technology.

2. New Direction for Chip Optimization: From Size to User Experience

Progress in chips is no longer solely measured by transistor size but by the system value, which reflects the actual benefits experienced by users—such as improved battery life, faster AI performance, and lower data center costs. System value is more complex than technical specifications like transistor size, so industry benchmarks need to include metrics such as power consumption, storage capacity, and computational power per unit area. For example, when buying a phone, consumers don't just care about the chip's manufacturing process (7 nanometers vs. 5 nanometers); they focus on factors like battery life, smoothness, and gaming performance. Tao Law focuses on optimizing these user experiences.

3. EDA Tools as a New Driver for Performance Improvement

EDA tools are essential for designing chips, similar to CAD software used in architecture. In the past, when Moore's Law was still effective, process improvements naturally enhanced chip performance, making EDA less critical. However, with the slowdown in technological progress, EDA plays a more pivotal role by optimizing chip layout, signal transmission paths, and interconnect designs to maximize existing technologies. Andrew believes that there is much untapped potential in EDA, especially in terms of improving chip design efficiency. In the future, AI will significantly enhance EDA capabilities, enabling automatic optimization that results in faster, more power-efficient, and cost-effective chip designs.

4. "Equivalent 1.4 Nanometers": A Critical Standard

Huawei's goal of achieving "equivalent 1.4 nanometers" by 2031 does not mean producing chips with a actual 1.4-nanometer process (the current state-of-the-art is 3 nanometers). Instead, it means meeting certain key performance indicators:

  • Power Consumption: Lower power consumption for the same level of performance.
  • Storage: Higher data storage density per unit area.
  • Computational Power: Faster processing speed for the same power consumption.
  • Transistor Density: A similar number of transistors per unit area as 1.4-nanometer chips.

This goal may also lead to shorter development cycles, lower costs, and reduced risks, as there would be no need to invest in extremely advanced lithography technologies (such as EUV lithography).

5. Potential Impact of Tao Law

If successful, Tao Law could have a profound impact on the semiconductor industry:

  • Reducing Bottlenecks: Avoiding the reliance on very advanced manufacturing processes and overcoming challenges like limitations with EUV lithography machines.
  • Promoting Collaborative Innovation: Encouraging industry-wide collaboration rather than focusing solely on individual components (such as chip fabrication).
  • Advancing Key Areas: Fields like AI chips and data centers, which require higher performance and energy efficiency, can benefit from these optimizations.
  • Redefining Chip Value: The industry's evaluation criteria may shift from focusing on process technology to emphasizing user value.

Andrew emphasizes that the significance of Tao Law lies in its ability to drive innovation and move the industry forward. It encourages a shift away from relying solely on past technological trends and encourages a rethinking of future development directions.

In summary, Tao Law offers a viable path to overcome the limitations of Moore's Law by focusing on system optimization. If successful, it could enable Huawei to break through current constraints and potentially lead the semiconductor industry to new growth paths. This will require industry-wide collaboration, as chip technology is an ecosystem that cannot be developed by a single company. Nonetheless, Huawei has pointed us in a direction worth exploring.